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An Area-Efficient CMOS Bandgap Reference Utilizing a Switched-Current Technique

机译:利用开关电流技术的高效面积CMOS带隙基准

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An area-efficient CMOS bandgap reference (BGR) with switched-current and current-memory techniques is presented. The proposed circuit uses only one parasitic bipolar transistor to generate a reference voltage so that significant area reduction can be achieved. In addition, bipolar transistor device mismatch can be eliminated. The circuit produces an output of about 650 mV, and simulated results show that the temperature coefficient of the output is less than 10.4 $hbox{ppm}/^{circ}hbox{C}$ in the temperature range from 0 $^{circ}hbox{C}$ to 100 $^{circ}hbox{C}$. The average current consumption is about 49.5 $muhbox{A}$ in the above temperature range. Furthermore, the output can be set to almost any value. The circuit was designed and simulated in 0.25- $muhbox{m}$ CMOS technology. The layout occupies less than 0.0011 $hbox{mm}^{2}$ $(100 mu hbox{m} times 110 muhbox{m})$.
机译:提出了一种具有开关电流和电流存储技术的面积有效的CMOS带隙基准(BGR)。所提出的电路仅使用一个寄生双极晶体管来产生参考电压,从而可以实现显着的面积减小。另外,可以消除双极晶体管器件的失配。该电路产生约650 mV的输出,仿真结果表明,在0 $ ^ {circ的温度范围内,输出的温度系数小于10.4 $ hbox {ppm} / ^ {circ} hbox {C} $ } hbox {C} $到100 $ ^ {circ} hbox {C} $。在上述温度范围内,平均电流消耗约为49.5 $ muhbox {A} $。此外,输出几乎可以设置为任何值。该电路是在0.25-muhbox {m} $ CMOS技术中设计和仿真的。布局占用的空间少于0.0011 $ hbox {mm} ^ {2} $ $(100 mu hbox {m}乘以110 muhbox {m})$。

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