A 2.4-GHz Extended-Range Type-I $SigmaDelta$ Fractional-$N$ Synthesizer With 1.8-MHz Loop Bandwidth and $-$110-dBc/Hz Phase Noise

摘要

Low-power low-loop-bandwidth (BW) integer-$N$ frequency synthesizers with low phase noise have been reported previously. However, achieving similar power/phase-noise performance for a fractional-$N$ synthesizer with a wide loop BW along with excellent spur performance has been challenging. A conventional fractional-$N$ synthesizer is clocked by a crystal oscillator operating at a reference frequency $(f_{rm ref})$ less than a few tens of megahertz. An attractive alternative is to replace the low-frequency crystal oscillator with an integer-$N$ phase-locked loop operating at an $f_{rm ref}$ of a few hundreds of megahertz. The advantages and challenges of designing such a wide-loop-BW fractional-$N$ synthesizer for low phase noise, spur, and power consumption are considered, and an extended-phase-range type-I $SigmaDelta$ fractional-$N$ frequency synthesizer is implemented with an optimal $f_{rm ref}$ of 290 MHz. Measurement results show that the synthesizer operating at 2.4 GHz with a wide loop BW of 1.8 MHz attains an in-band phase noise of $-$110 dBc/Hz and a worst case fractional spur of $-$69 dBc. The digital-intensive 0.18-$muh-n-nbox{m}$ CMOS design consumes 14.1 mW. No quantization noise cancellation or charge pump linearization techniques are used.