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首页> 外文期刊>Circuits and Systems II: Express Briefs, IEEE Transactions on >General Analysis of Feedback DAC's Clock Jitter in Continuous-Time Sigma-Delta Modulators
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General Analysis of Feedback DAC's Clock Jitter in Continuous-Time Sigma-Delta Modulators

机译:连续时间Sigma-Delta调制器中反馈DAC的时钟抖动的一般分析

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This brief describes a framework for the analysis of continuous-time sigma-delta ( $SigmaDelta$) modulators (CTSDM) in the presence of a feedback digital-to-analog converter (DAC)'s clock jitter using the discrete-time Volterra series. A time-domain mixing operation between jitter and CTSDM's digital output sequence is modeled with a second-order Volterra operator. The resulting closed-form jitter-induced CTSDM's output power spectral density is simple and includes the effects of the following: 1) quantization noise power; 2) input signal power and frequency; 3) CTSDM's quantization noise transfer function; 4) DAC's pulse shape; and 5) colored jitter. A third-order CTSDM is analyzed as a test bed. Excellent agreement between theoretical predictions and behavioral simulations is observed.
机译:本简介描述了使用离散时间Volterra系列在存在反馈数模转换器(DAC)时钟抖动的情况下分析连续时间sigma-delta($ SigmaDelta $)调制器(CTSDM)的框架。使用二阶Volterra运算符对抖动和CTSDM的数字输出序列之间的时域混合操作进行建模。由此产生的闭合形式的抖动引起的CTSDM的输出功率频谱密度很简单,并且包括以下影响:1)量化噪声功率; 2)输入信号的功率和频率; 3)CTSDM的量化噪声传递函数; 4)DAC的脉冲形状; 5)彩色抖动。分析了三次CTSDM作为测试平台。观察到理论预测和行为模拟之间的极好的一致性。

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