A Normalized Figure of Merit for Capacitive Accelerometer Interface Circuits

摘要

This brief proposes a figure of merit for capacitive inertial sensor interface circuits that is a function of the electronic circuitry and not of the mechanical device. The effect of the sensor's sensitivity, sense capacitance and total parasitic capacitance on the overall system's linearity and power consumption is investigated. A literature review of interface circuits is provided showing a tradeoff in linearity and bandwidth when normalized to the specifications of the sensor.