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Gain, Signal-to-Noise Ratio and Power Optimization of Envelope Detector for Ultra-Low-Power Wake-Up Receiver

机译:超低功耗唤醒接收机的包络检波器的增益,信噪比和功率优化

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This brief considers the design of an envelope detector for the front-end of a wake-up receiver. A design procedure that allows to optimize the trade-offs between gain, signal-to-noise ratio and power consumption is proposed. It is based on the analysis of the envelope detector in all inversion regions. Two novel figures of merit that only depend on the inversion level are proposed to aid the design. The predictions are verified against simulation and measurements results, both at the transistor and complete circuit level. An arrangement for the bias circuitry of the wake-up receiver front-end is proposed that leads to an intrinsic bandpass characteristic that improves the signal-to-noise ratio. A prototype integrated circuit, in a 130 nm CMOS process, of a fully integrated wake-up receiver front-end for the 2.4 GHz band was designed based on the presented approach and measured. The results show a remarkable conversion gain with a scaling factor of 9800 1/V with a current consumption of 100 nA from 1.2 V at 12 dB signal-to-noise ratio and -48.5 dBm sensitivity.
机译:本简介考虑了用于唤醒接收机前端的包络检波器的设计。提出了一种允许优化增益,信噪比和功耗之间权衡的设计程序。它基于对所有反相区域中包络检波器的分析。提出了两个仅取决于反演水平的新颖品质因数来帮助设计。在晶体管和完整电路级别上,均根据仿真和测量结果验证了预测结果。提出了用于唤醒接收机前端的偏置电路的布置,其导致固有的带通特性,该特性提高了信噪比。基于提出的方法设计并测量了用于2.4 GHz频段的完全集成唤醒接收器前端的130 nm CMOS工艺原型集成电路。结果表明,转换比为9800 1 / V时,转换增益显着,在1.2 dB信噪比和-48.5 dBm灵敏度下,电流消耗为1.2nV,消耗电流为100nA。

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