RISC-V Shakes Up the Embedded Processor Space

摘要

If you were following the processor wars of the early '90s, you'll remember there was a lot of press coverage (from myself included) about RISC (reduced instruction set computing) versus CISC (complex instruction set computing) microprocessor architectures. Fast forward to today and those differences have grown irrelevant-and pretty much all processor instruction set architectures (ISA) became complex. In recent years, the term RISC is back again in the form of RISC-V. In an industry dominated by ubiquitous architectures such as Arm and the x86 from Intel and AMD, RISC-V has come along and shaken things up by using a new and different encoding scheme created to be free and open so that everyone can use it without paying license fee. In keeping with its RISC name, the RISC-V ISA is simple and compact, but its extensibility is equally important. The RISC-V specification enables custom instruction extensions to facilitate the design of Domain-Specific Architectures (DSAs). These are important for applications such as AI, ADAS, AR/VR, machine learning (ML) and others.