...
首页> 外文期刊>Applied Surface Science >Tertiarybutylarsine damage-free thin-film doping and conformal surface coverage of substrate-released horizontal Si nanowires
【24h】

Tertiarybutylarsine damage-free thin-film doping and conformal surface coverage of substrate-released horizontal Si nanowires

机译:叔丁基ar氨酸无损伤薄膜掺杂和基底释放的水平Si纳米线的保形表面覆盖

获取原文
获取原文并翻译 | 示例
   

获取外文期刊封面封底 >>

       

摘要

Conformal damage-free doping is the holy grail for 3D semiconductor device structures, such as those used in multi-gate and nanowire-based field effect transistors (FETs). The shape, dimension, pitch, and spacing of parallel conduction paths introduce increased complexity in a number of ways, but particularly in the area of intentional impurity introduction for doping. To this end, gas-phase doping using tertiarybutylarsine (TBA) was employed to dope silicon-on-insulator (SOI) thin films based circular transfer length measurement (CTLM) devices with top silicon thicknesses down to 4.5 nm, and substrate-released horizontal Si nanowires. Dopant incorporation was observed with a peak active carrier concentration of similar to 7 x 10(19) cm(-3) after a 1050 degrees C rapid thermal anneal (RTA). An optimisation study showed that dopant incorporation is similar for varying exposure times to TBA gas, while increased exposure can cause roughening of the Si due to etching. Structural analysis by cross-sectional transmission electron microscopy (XTEM) and Energy-dispersive X-ray spectroscopy (EDX) showed conformal formation of an As-rich surface oxide on free standing nanowires, without surface etching or crystal damage, making this process promising for future gate-all-around (GAA) transistor architectures.
机译:保形无损伤掺杂是3D半导体器件结构的圣杯,例如在多栅极和基于纳米线的场效应晶体管(FET)中使用的结构。平行导电路径的形状,尺寸,间距和间距以多种方式增加了复杂性,但特别是在有意引入杂质进行掺杂的领域。为此,使用叔丁基ar(TBA)进行气相掺杂来掺杂基于绝缘层上硅(SOI)的薄膜,该薄膜基于圆形传输长度测量(CTLM)器件,其顶层硅厚度低至4.5 nm,并且基板可释放水平硅纳米线。在1050摄氏度快速热退火(RTA)之后,观察到掺入的掺杂剂的峰值活性载流子浓度类似于7 x 10(19)cm(-3)。一项优化研究表明,对于不同的TBA气体暴露时间,掺杂剂的掺入量相似,而增加的暴露量则可能由于蚀刻而使Si变粗糙。通过横截面透射电子显微镜(XTEM)和能量色散X射线光谱(EDX)进行的结构分析表明,在自由站立的纳米线上保形地形成了富含As的表面氧化物,而没有表面蚀刻或晶体损坏,这使得该工艺有望用于未来的全能(GAA)晶体管架构。

著录项

相似文献

  • 外文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号