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Nanopore processing in dielectric materials and dielectric templateassisted nanoarray synthesis: Using pulsed bias to enhance process throughput and precision

机译:电介质材料中的纳米孔处理和电介质模板辅助的纳米阵列合成:使用脉冲偏压来提高工艺产量和精度

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摘要

An effective technique to improve the precision and throughput of energetic ion condensation through dielectric nanoporous templates and reduce nanopore clogging by using finely tuned pulsed bias is proposed. Multiscale numerical simulations of ion deposition show the possibility of controlling the dynamic charge balance on the upper template's surface to minimize ion deposition on nanopore sidewalls and to deposit ions selectively on the substrate surface in contact with the pore opening. In this way, the shapes of nanodots in template-assisted nanoarray fabrication can be effectively controlled. The results are applicable to various processes involving porous dielectric nanomaterials and dense nanoarrays.
机译:提出了一种通过微调脉冲偏压提高高能离子通过介电纳米孔模板缩合的精度和通量并减少纳米孔堵塞的有效技术。离子沉积的多尺度数值模拟表明,可以控制上部模板表面上的动态电荷平衡,以最大程度地减少纳米孔侧壁上的离子沉积,并在与孔开口接触的基底表面上选择性沉积离子。以这种方式,可以有效地控制模板辅助纳米阵列制造中纳米点的形状。该结果适用于涉及多孔介电纳米材料和致密纳米阵列的各种工艺。

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