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首页> 外文期刊>Applied physics express >An AIN Sacrificial Buffer Layer Inserted into the GaN/Patterned Sapphire Substrate for a Chemical Lift-Off Process
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An AIN Sacrificial Buffer Layer Inserted into the GaN/Patterned Sapphire Substrate for a Chemical Lift-Off Process

机译:用于化学剥离工艺的GaN牺牲缓冲层插入GaN /蓝宝石衬底中

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摘要

InGaN-based light-emitting diodes (LEDs) grown on triangle-shaped patterned sapphire substrates were separated through a chemical lift-off process by laterally etching an AIN sacrificial layer at the GaN/sapphire substrate interface. After the epitaxial growth, an air-void structure was observed at the patterned region on the sapphire substrate that provided an empty space to increase the lateral etching rate of the AIN buffer layer. The lateral etching rate of the AIN buffer layer was calculated at 10 μm/min for the 100-μm-width LED chip that was lifted off from the sapphire substrate. A triangular-shaped hole structure and a hexagonal-shaped air-void structure were observed on the lift-off GaN surface that was transferred from the patterned sapphire substrate. Comparing to the LED/sapphire structure, a peak wavelength blueshift phenomenon of the micro-photoluminescence spectra was observed on the lifted off LED chip caused by the release of a compressive strain at the GaN/sapphire substrate interface. The chemical lift-off process was achieved by using an AIN buffer layer as a sacrificial layer in a hot potassium hydroxide solution.
机译:通过在GaN /蓝宝石衬底界面处横向蚀刻AIN牺牲层,通过化学剥离工艺将生长在三角形图案化蓝宝石衬底上的InGaN基发光二极管(LED)分离。在外延生长之后,在蓝宝石衬底上的图案化区域观察到气隙结构,该空隙区域提供了空的空间以增加AIN缓冲层的横向蚀刻速率。对于从蓝宝石衬底上提起的100μm宽度的LED芯片,AIN缓冲层的横向蚀刻速率计算为10μm/ min。在从图案化的蓝宝石衬底转移的剥离的GaN表面上观察到三角形的孔结构和六边形的气孔结构。与LED /蓝宝石结构相比,由于GaN /蓝宝石衬底界面处的压缩应变的释放,在抬离的LED芯片上观察到了微光致发光光谱的峰值波长蓝移现象。通过在热氢氧化钾溶液中使用AIN缓冲层作为牺牲层来实现化学剥离工艺。

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  • 来源
    《Applied physics express》 |2010年第3期|p.031001.1-031001.3|共3页
  • 作者单位

    Department of Materials Science and Engineering, National Chung Hsing University, Taichung, Taiwan 402, R.O.C.;

    rnDepartment of Materials Science and Engineering, National Chung Hsing University, Taichung, Taiwan 402, R.O.C.;

    rnDepartment of Materials Science and Engineering, National Chung Hsing University, Taichung, Taiwan 402, R.O.C.;

    rnDepartment of Materials Science and Engineering, National Chung Hsing University, Taichung, Taiwan 402, R.O.C.;

    rnDepartment of Materials Science and Engineering, National Chung Hsing University, Taichung, Taiwan 402, R.O.C.;

    rnDepartment of Materials Science and Engineering, National Chung Hsing University, Taichung, Taiwan 402, R.O.C.;

    rnDepartment of Materials Science and Engineering, National Chung Hsing University, Taichung, Taiwan 402, R.O.C.;

    rnDepartment of Materials Science and Engineering, National Chung Hsing University, Taichung, Taiwan 402, R.O.C.;

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