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CMOS-based near zero-offset multiple inputs max–min circuits and its applications

机译:基于CMOS的接近零偏移的多输入最大最小值电路及其应用

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摘要

CMOS-based near zero-offset multiple inputs maximum circuit and minimum circuits are proposed. The analog signal building blocks including shunt-feedback buffer, voltage-subtraction circuits and current mirrors are deployed for obtained the good performances. This achieved circuit is a simply scheme and able to work with low-power supplies. The input range is obtained around ±600 mV within ±1.5 V power supplies. Near zero-offset and low-output impedance are provided by proposed circuit. The delay of output is less than 5 ns for THD less than 1% and frequency response up to 500 MHz. Half-wave, full-wave rectifiers and 4 bits linear combination Digital-to-Analog Converter (DAC) are raised up to confirm the realistic applications. All performances including the DC-characteristic, frequency response, high-frequency wave output are simulated by PSpice.
机译:提出了基于CMOS的近零偏移多输入最大和最小电路。部署了包括并联反馈缓冲器,电压减法电路和电流镜的模拟信号构建块,以获得良好的性能。这种实现的电路是一个简单的方案,并且能够与低功率电源一起工作。在±1.5 V电源内,输入范围约为±600 mV。所提出的电路提供接近零偏移和低输出阻抗。对于THD小于1%,频率响应高达500 MHz,输出延迟小于5 ns。提出了半波,全波整流器和4位线性组合数模转换器(DAC),以确认实际应用。 PSpice模拟了所有性能,包括直流特性,频率响应,高频波输出。

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