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首页> 外文期刊>Analog Integrated Circuits and Signal Processing >A sigma–delta interface ASIC for force-feedback micromachined capacitive accelerometer
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A sigma–delta interface ASIC for force-feedback micromachined capacitive accelerometer

机译:用于力反馈微加工电容式加速度计的sigma-delta接口ASIC

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摘要

A single-loop fourth-order sigma–delta (ΣΔ) interface circuit for micromachined accelerometer is presented in this study. Two additional electronic integrators are cascaded with the micromachine sensing element to form a fourth-order loop filter to eliminate quantization noise. A precise model for the overall system is set up based on nonlinear model of 1-bit quantizer. Three main noise sources affecting the overall system resolution of a ΣΔ accelerometer: mechanical noise, electronic noise and quantization noise are analyzed in more detail. A switched-capacitor charge integrator and correlated double sampling are applied to reduce input-referred electronic noise. The ASIC is fabricated in 0.5 μm two-metal two-poly n-well CMOS process, and test results show that the noise density floors of the open-loop and closed-loop modes are 12 and 80 μg/Hz1/2, respectively, the sensitivity is 1.25 V/g, the full measurement range can be achieved from −2 to +2 g, and the power dissipation is 40 mW.
机译:本研究提出了一种用于微机械加速度计的单回路四阶sigma-delta(ΣΔ)接口电路。两个附加的电子积分器与微机械感测元件级联,形成一个四阶环路滤波器,以消除量化噪声。基于1位量化器的非线性模型,建立了整个系统的精确模型。影响ΣΔ加速度计的整体系统分辨率的三个主要噪声源:机械噪声,电子噪声和量化噪声将得到更详细的分析。应用了开关电容器电荷积分器和相关的双采样以减少输入参考的电子噪声。 ASIC采用0.5μm两金属双多晶硅n阱CMOS工艺制造,测试结果表明,开环和闭环模式的噪声密度下限分别为12和80μg/ Hz 1 /分别为2 ,灵敏度为1.25 V / g,整个测量范围可从-2到+2 g,功耗为40 mW。

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