JITPR: A Framework for Supporting Fast Application's Implementation onto FPGAs

摘要

The execution runtime usually is a headache for designers performing application mapping onto reconfig-urable architectures. In this article we propose a methodology, as well as the supporting toolset, targeting to provide fast application implementation onto reconfigurable architectures with the usage of a Just-In-Time (JIT) compilation framework. Experimental results prove the efficiency of the introduced framework, as we reduce the execution runtime compared to the state-of-the-art approach on average by 53.5 ×. Additionally, the derived solutions achieve higher operation frequencies by 1.17 ×, while they also exhibit significant lower fragmentation ratios of hardware resources.