一种嵌入重复控制内模的三相锁相环的设计与实现

摘要

As one of the key technologies of distributed grid-connected power generation system, grid synchronization technique is always the research hotspot. Usually numerous filters (or regulators) are needed for current phase-locked loop (PLL) algorithms to totally eliminate harmonic. Hence, a new phase-locked loop based on internal model of repetitive control is put forward. An extraction structure which can totally eliminate harmonic is designed. Wherein, the characteristic of the internal model that generates the resonant peak at grid fundamental frequency and every harmonic frequency is used, and the characteristic of multiple-complex coefficient-filter that can separate positive and negative sequence of grid fundamental wave is also taken into account. The grid frequency, phase and other related information can be extracted from the pure positive sequence by synchronous frame PLL. Finally, the proposed PLL is tested under distorted and unbalanced grid by Matlab/Simulink simulation and the related experiment. The results show the validity and superiority of this method.%作为分布式并网发电系统众多关键技术之一的电网同步锁相技术一直是国内外研究的热点。针对现有锁相环算法需要级联无穷个滤波器（或调节器）才能完全抑制电网谐波这一问题，提出了一种嵌入重复控制内模的锁相环方法。利用重复控制内模在电网基波频率及各次谐波频率处产生谐振尖峰这一特性，结合交叉解耦复数滤波器能分离电网基波正负序的特点，设计了一种能够完全消除谐波的正负序分量提取结构，分离出的纯净正序分量经过基本的同步坐标系锁相环能提取出频率、相位等信息。最后通过Matlab/Simulink仿真和相关实验在电网电压畸变、不平衡情况下对所提锁相环方法进行了测试，结果验证了该方法的正确性和有效性。