基于NINO芯片的TOT读出电子学系统的研究

摘要

介绍了CERN设计的一款基于过阈时间法(Time - Over - Threshold)的ASIC芯片-NINO,并列出了一些基于NINO芯片设计的测试板的测试结果,用于评估该芯片在BES Ⅲ端盖TOF升级及在中子管位置灵敏探测器中的位置测量中应用的可能性.NINO芯片8通道高度集成,对实验电路板的设计和测试表明,其噪声抖动低(前沿噪声抖动约5.1 ps),可以满足TOT方法中高精度时间测量的要求.%The test result of the NINO chip which is based on the time over threshold (TOT) technique is described. The test is carried out to evaluate the possibility of applying the chip in the upgrade of BES III TOF and in the position measurement of Neutrino Position Sensitive Proportional Detector. The NINO chip is 8 channel integrated and of low noise ( 5.1 ps front edge jitter) which can serve high precision time measurement satisfactorily.