Virtex-Ⅱ系列FPGA的回读与部分重配置

摘要

In this paper, the system functions of an experimental prototype for Virtex-II FPGA based on SRAM are introduced. Readback and partial reconfiguration of XA2V3000 FPGA are performed. The timing sequence on JTAG interfaces is presented as well. Finally, an analysis of experimental results is made. The results indicate that the function of reading back configuration data from FPGA can detect single-event upsets (SEU), while partial reconfiguration can reduce cumulative effects caused by FPGA upsets and repair the system.%介绍了基于SRAM的Virtex-Ⅱ系列FPGA试验样板的系统功能,实现了对XQ2V3000 FPGA的回读与部分重配置,并给出了JTAG接口下的时序,最后分析了试验的结果.结果表明,FPGA回读可以有效地检测FPGA是否发生了单粒子翻转,而部分重配置可以有效地降低FPGA发生翻转的累积效应,并修复系统功能.