本系统将FPGA（现场可编程门阵列）引入作为数字频率计的数据处理核心，提升了数字频率计的整体性能。待测信号送入前置模拟信号调理电路进行放大、整形等处理后，转化为同频率逻辑电平信号，在FPGA芯片中嵌入增强型8051 IP 核，完成测量、处理、显示工作。经实验证明，本系统设计可以精准地完成对频率、占空比、时间间隔的测量。%In this paper, the performance of digital frequency counter is promoted by choosing FPGA as the data processing core. In order to convert the signal into the same⁃frequency logic signal, the test signal is amplified and shaped by analog conditioning circuit. With the enhanced 8051 IP core embedded in, to measure, process data and display is realized by the FPGA chip. Finally, experiments have demonstrated the effectiveness of the system design.
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