地址数据复用型Flash存储器测试技术研究

摘要

With the rapid development of semiconductor technology, the mobile storage equipment increase quickly. As a common mobile storage equipment, the Flash chips are used widely and the testing technical requirements of Flash chips is also became higher. The testing technology research and the circuit design of Address data type Flash memory multiplexing, which main is to design and improve the digital system algorithm graphics functions of the mass digital integrated circuit testing system functions. Therefore, K9F2G08ROA is to be tested througth improved the functions of digital system algorithm graphics. The Algorithm graphics generator is consists of more arithmetic logic units, multiplexers and operation registers. So that the Address data type Flash multiplexing memory can be tested lastly and simply, and the exploitation dificulties of test program will be overcomed.%随着半导体技术的迅猛发展,移动存储设备快速增长。Flash芯片作为移动存储设备中最常用的器件,得到了日趋广泛的应用,对Flash芯片的测试要求也越来越高。地址数据复用型Flash存储器测试技术研究及电路设计,设计改善大规模数字集成电路测试系统数字系统算法图形功能。对K9F2G08R0A进行了测试并通过对数字系统算法图形功能进行改善,算法图形发生器由多个算术逻辑单元、多路选择器以及操作寄存器组成,可以实现复杂的逻辑操作和算术运算,可以更快、更简便地对地址复用型Flash存储器进行测试,减少测试程序开发难度。