433 MHz CMOS功率放大器设计

摘要

A 433MHz class-AB power amplifier is designed based on IBM 0.18um SOI CMOS process. To improve the output power, the driver stage and the output stage is designed using the cascade structure. To solve the problem of the unbalanced voltage between the common gate MOSFET and the common source MOSFET, the self-adaptive-bias design is used, and this improves the reliability of the circuit. This chip integrates the input match circuit and the inter stage match circuit. The post-simulation shows that the gain of the amplifier is 33.97dB,1dB compression point is 28.12dBm and the PAE is 23.86%.%基于IBM 0.18um SOI CMOS工艺,设计了一款工作在433 MHz的两级AB类功率放大器.驱动级和输出级均采用共源共栅结构以提高电源电压,从而提高输出功率.采用了自适应偏置电路解决了共源管和共栅管之间电压分布不均的问题,提高了电路可靠性.输入级采用了电压-电压反馈降低增益,提高电路稳定性.片内集成了输入匹配、级间匹配电路.后仿真结果表明,该放大器的增益为33.97 dB,1 dB压缩点为28.12 dBm,PAE为23.86%.