用于低压差线性稳压器的输出精密微调设计技术∗

摘要

提出了一种用于低压差线性稳压器( LDO：Low-Dropout regulator)的输出精密微调方法,通过在反馈网络中引入可微调电阻梯实现对LDO输出的精密调整,并采取伪电阻保护的版图布局方式提高电阻梯的匹配性能。基于65 nm CMOS工艺对LDO进行了设计,整个LDO线性调整率约为0.05 mV/V,输出电压在1.02 V~1.36 V范围内能够按照0.02 V/step的最小步长进行精密微调,能有效减小由电源电压、温度等因素引起的输出误差,适合嵌入式片上系统( SoC：System-on-Chip)的应用。%A high-precision output-tuning technique used for low-dropout regulator( LDO) is presented in this paper. A tunable resistor ladder is utilized in the feedback network for high-precision LDO output control. Dummy resistors are also introduced to surround the unit resistors for good matching performance. The applicability and superiority of this proposed method is verified by the design of a 65 nm CMOS LDO. The design results show that the line regula-tion of this LDO is about 0.05 mV/V,and the output voltage can be precisely tuned by 0.02 V/step within a range from 1.02 V to 1.36 V. The high-precision tuning ability can effectively overcome the output errors caused by power supply variation,temperature drift and other non-ideal factors,making it very suitable for embedded SoC( SoC:Sys-tem on Chip) applications.