基于IP核的PCIE总线接口逻辑的设计和实现

摘要

When PCIE is used for interconnection of devices,the interface logic is needed for interaction between the bus and internal function.This paper adopted a method based on IP core,and completed the designing and implementation of the interface logic in Xilinx Virtex-7 series FPGA.Then the function and performance was verified.The results showed that registers accessing and data transfer in DMA mode were correctly and the bandwidth of DMA transmission was more than 70%.%使用PCIE总线进行设备间互联时,需要设计接口逻辑实现PCIE总线与内部功能的交互,采用一种基于IP核的方法,在Xilinx Virtex-7系列FPGA上完成了PCIE总线接口逻辑的设计和实现,并进行了功能和性能验证,结果表明逻辑能够正确进行寄存器访问和DMA传输,且DMA传输带宽能达到PCIE总线带宽的70%以上.