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Modeling geometry effects on tunneling conduction and degradation in MOS structures.

机译:建模几何形状对MOS结构中的隧穿传导和退化的影响。

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摘要

With technology advances it has become possible to grow high quality semiconductor films, allowing development of heterostructure tunneling devices, for high frequency logic and memory applications. Tunneling is commonly used to transport charges through thin dielectrics in semiconductor nonvolatile memories. In this dissertation comprehensive physical models have been developed to examine the reliability problems associated with high field charge transport in MOS structures.; First, a detailed model simulating the time-dependent tunneling and degradation characteristics of MOS structures under ramped voltage stress, incorporating geometry effects, trapping at pre-stress and post-stress trap sites, and field dependent charge to breakdown is discussed. For the first time, the effect of gate edge on the time dependent tunneling characteristics has been quantitatively analyzed. It is found that gate edge region can enhance the tunneling current significantly and also accelerate oxide degradation and breakdown. Two significant applications of our model are: (1) to eliminate geometry effects in the oxide parameters extracted using ramp-stress measurements, and (2) to use the asymmetry in gate and substrate injections to electrically characterize the gate geometry and obtain an effective edge curvature.; Second, a novel technique to solve the 2-D time independent Schrodinger equation in arbitrary nonplanar regions using Schwarz-Christoffel transformation is presented. This has been incorporated in a numerical model to calculate the electron tunneling current component from gate edges of MOS structures more accurately than the above mentioned Fowler-Nordheim equation model. Tunneling probability from the gate edge is obtained by direct solution of the time-independent Schrodinger equation, using Schwarz-Christoffel transformation to map the non-planar gate edge region to a rectangular domain, and solving the transformed Schrodinger equation by finite element methods. The time invariant I-V characteristics have been simulated and compared with calculations from the Fowler-Nordheim model.; Thirdly, the effect of the stressing voltage waveshape on tunnel oxide degradation is simulated using a capacitive equivalent circuit and non-linear current sources. Oxide degradation is obtained by calculating the cell threshold voltage and the field-normalized injected charge, versus number of programming cycles, assuming trapping at uniformly distributed pre-stress and post-stress trapping centers.
机译:随着技术的进步,生长高质量的半导体膜成为可能,从而允许开发用于高频逻辑和存储器应用的异质结构隧穿器件。隧道通常用于通过半导体非易失性存储器中的薄电介质传输电荷。本论文开发了综合的物理模型来研究与MOS结构中的高场电荷传输有关的可靠性问题。首先,讨论了一个详细模型,该模型模拟了随时间变化的电压应力下MOS结构随时间的隧穿和退化特性,并结合了几何效应,在预应力和后应力陷阱部位处的俘获以及与电场相关的击穿电荷。首次定量分析了栅极边缘对随时间变化的隧穿特性的影响。发现栅极边缘区域可以显着增强隧穿电流,并且还可以加速氧化物的降解和击穿。我们模型的两个重要应用是:(1)消除使用斜坡应力测量提取的氧化物参数中的几何效应,以及(2)在浇口和衬底注入中使用不对称性来电气表征浇口几何形状并获得有效边缘曲率。其次,提出了使用Schwarz-Christoffel变换求解任意非平面区域中二维时间独立Schrodinger方程的新技术。与上面提到的Fowler-Nordheim方程模型相比,已将其合并到数值模型中以从MOS结构的栅极边缘更精确地计算电子隧穿电流分量。通过直接求解与时间无关的Schrodinger方程,使用Schwarz-Christoffel变换将非平面的栅极边缘区域映射到矩形区域,并通过有限元方法求解变换后的Schrodinger方程,可以得出从栅极边缘的隧穿概率。模拟了时不变的I-V特性,并与Fowler-Nordheim模型的计算结果进行了比较。第三,使用电容等效电路和非线性电流源模拟了应力电压波形对隧道氧化物退化的影响。通过计算单元阈值电压和场归一化注入电荷与编程周期数之间的关系(假设在均匀分布的预应力和后应力捕获中心处进行捕获),可以实现氧化物降解。

著录项

  • 作者

    Ramaswami, Ravi.;

  • 作者单位

    University of Maryland, College Park.;

  • 授予单位 University of Maryland, College Park.;
  • 学科 Engineering Electronics and Electrical.; Physics Electricity and Magnetism.; Physics Condensed Matter.
  • 学位 Ph.D.
  • 年度 1991
  • 页码 144 p.
  • 总页数 144
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;电磁学、电动力学;
  • 关键词

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