CMOS RF front-end IC design and reliability for Bluetooth wireless receiver.

摘要

Due to continued down scaling, deep submicron CMOS transistors offer a cutoff frequency (f_T) over 70 GHz and a minimum noise figure lower than 0.5 dB. CMOS technologies also offer low cost and high integration. These promising RF features push CMOS ICs to compete for Bluetooth, wireless local-area network, and cellular applications. However, hot carrier (HC) stress and soft breakdown (SBD) induced device degradation pose a limit to the device scaling. Moreover, transistor aging and SBD induced degradation will seriously reduce the design margin of the RF circuits.; This dissertation explores CMOS RF front-end IC design and circuit reliability for portable wireless receivers. The objective behind this work is to achieve an increase in integration level and improvements in reliability simultaneously. Focusing on the optimization of CMOS low noise amplifier (LNA) and down-conversion mixer circuit performance, the LNA noise figure and the mixer linearity are modeled while taking into account distributed MOS gate resistance and gate to drain capacitance. Gain, power consumption, and noise parameters of the RF circuit are simultaneously optimized using closed-form analytical equations. The relation between the input 3rd order interception point (IIP3) and the source inductance in the mixer is studied in depth. The analytical predictions are verified with the Cadence SpectreRF circuit simulation and experimental data. Good agreement between the model predictions and experimental data is obtained. The analytical equations provide fast turn-around design time of RFICs in mixed-signal ICs for telecommunication applications.; Concentrating on the relationship between RF circuit performance degradation and MOSFET device degradation, a systematic study of RF circuit performance subject to soft oxide breakdown (SBD) and hot carrier (HC) stress is demonstrated. Device parameters before and after stressing are extracted from the experimental data of 0.18μm CMOS technology. The effect of SBD and HC degradations on s-parameter, f_T, g_m, F_min and equivalent noise resistance R_n of an RF device has been studied. Since the figures of merit for the RF device characterization are gain, noise figure, linearity and impedance matching, the RF Low noise amplifier performance drift is evaluated on these features. The experimental and simulation results show the need for SBD and HC induced RF circuit performance degradation to be considered in the design stage of RF CMOS ICs.; The combined analog/digital operation nature of the CMOS Gilbert cell mixer make it very vulnerable to hot-carrier and oxide breakdown issue. The mixer circuit operation conditions for the occurrence of HC and SBD are analyzed, and circuit performance model are presented to relate the device degradation to circuit performance degradation. Finally, some redesign strategies for the mixer circuit are proposed which lead to a reduction in both HC and SBD. The presented simulations show improved noise performance with the similar gain, IIP3 and power consumption.