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DEVICE FOR VERIFYING RELIABILITY OF ELECTRO-MIGRATION IN CMOS FULL CUSTOM LSI DESIGN

机译:在CMOS全定制LSI设计中验证电迁移可靠性的设备

摘要

PURPOSE: To verify the reliability of the electro-migration of a CMOS full custom LSI after design without using circuit simulation. ;CONSTITUTION: In a storage device 1-5, the logical connection information of the electronic circuit of the designed CMOS full custom LSI and a parametered logical connection information storing a characteristic parameter such as the size and the parasitic capacity, etc., of each element after the design are stored. In a verification device 1-6, an output circuit detecting part 2-21 detects an output circuit contained in the CMOS full custom LSI. An operation rate determining part 2-23 and a load capacity calculating part 2-22 calculate operation rate and load capacity for every individual output circuit. A mean current density calculating part 2-24 calculates mean current density for every individual output circuit on the basis of the calculated load capacity and operation rate, and further, fundamental frequency information, supply voltage value information, wiring width and wiring film thickness. A verifying part 2-25 verifies the mean current density by comparing it with reference current density for every individual output circuit.;COPYRIGHT: (C)1996,JPO
机译:目的:在设计后不使用电路仿真的情况下,验证CMOS全定制LSI电迁移的可靠性。 ;组成:在存储设备1-5中,设计的CMOS全定制LSI的电子电路的逻辑连接信息和存储每个特征参数(例如大小和寄生电容等)的参数化逻辑连接信息设计后的元素被存储。在验证装置1-6中,输出电路检测部2-21检测包含在CMOS全定制LSI中的输出电路。运转率确定部2-23和负载容量计算部2-22针对每个单独的输出电路计算运转率和负载容量。平均电流密度计算部2-24基于计算出的负载容量和工作率,以及基础频率信息,电源电压值信息,配线宽度和配线膜厚度,计算每个输出电路的平均电流密度。验证部分2-25通过将平均电流密度与每个输出电路的参考电流密度进行比较来验证平均电流密度。;版权所有:(C)1996,JPO

著录项

  • 公开/公告号JPH08166984A

    专利类型

  • 公开/公告日1996-06-25

    原文格式PDF

  • 申请/专利权人 NEC CORP;

    申请/专利号JP19940333373

  • 发明设计人 MURAI SHUZO;

    申请日1994-12-15

  • 分类号G06F17/50;

  • 国家 JP

  • 入库时间 2022-08-22 04:01:30

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