Low-voltage and low-power silicon germanium BiCMOS topologies for 80-100 gigabit-per-second serial communication.

摘要

This thesis focuses on new design challenges which arise in the design of next-generation wireline circuits operating at data rates of 80--100 Gb/s. Methodologies for low-power high-speed logic are described. A new low-voltage BiCMOS current-mode logic family is introduced, which allows for more than a 20% reduction in power consumption in high-speed building blocks. This logic family, based on a MOS-HBT cascode topology with common-source nMOS and common-base SiGe HBT, takes full advantage of the best features of both devices to achieve low-voltage, high-speed operation. Algorithmic design methodologies for MOS and BiCMOS high-speed logic circuits are presented based on the invariance of characteristic current densities in nanoscale MOSFETs, resulting in robust designs which can be ported between foundries and even across technology nodes.; Further reduction in building block power consumption can be achieved by trading of bias current for inductive peaking. For the first time, monolithic spiral inductors and transformers are demonstrated for use at mm-wave frequencies. Broadband inductor models along with a model extraction methodology based on measured or simulated y-parameters is described for the first time.; Low-noise broadband input stages are compared theoretically and experimentally to determine the best topology to improve sensitivity in Ethernet or backplane receivers. It is proven that the transimpedance input stage yields the best noise performance, highest bandwidth, best input matching, and lowest power consumption than more conventional emitter-follower-inverter or Cherry-Hooper input stages, making it an ideal topology for use in broadband receivers.; The new concepts presented in this thesis enable the design of highly-integrated broadband circuits in a 130-nm SiGe BiCMOS technology with 150-GHz fT SiGe HBT. The first single-chip pseudo-random binary sequence generator with a pattern length of 231 - 1 is reported and achieves a maximum output data rate of 80 Gb/s. Additionally, the first 86-Gb/s serial transmitter is presented, which operates from a 2.5-V supply voltage and consumes less power (1.36 W) than any 40-Gb/s serial transmitter reported to date.