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Characterization of process-induced defects in silicon technology

机译:硅技术中工艺引起的缺陷的表征

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摘要

Vertical bird's beak formation leads to the injection of silicon interstitials and to compressive stress int eh silicon. Initial stages of nanometersized dislocations and stacking faults which may act as sources for further dislocation generation as well as lattice distortions were observed by highresolution transmission electron microscopy. High-dose source/drain as well as low-dose well implantations are described which lead to the generation of stacking faults which are responsible for retention time fails in dynamic random access memories. Considerations of the point defect density generated by the implantation may solve the problems. Non-optimized reactive ion etching of isolation trenches for silicon on insulator technology causes mechanical stress, defect formation and eventually metal contam ination. With help of electrical measurements using a gated-diode built into the test structure the technology could be characterized and optimized.
机译:垂直鸟喙的形成导致硅间隙的注入并导致硅内部的压缩应力。通过高分辨率透射电子显微镜观察到了纳米级位错和堆垛层错的初始阶段,这些位错和堆垛层错可作为进一步位错产生以及晶格畸变的来源。描述了大剂量的源极/漏极以及小剂量的阱注入,这些注入会导致导致动态随机存取存储器中的保留时间失败的堆垛层错。考虑由注入产生的点缺陷密度可以解决该问题。在绝缘体技术上对硅隔离沟槽进行非优化的反应离子刻蚀会导致机械应力,缺陷形成并最终导致金属污染。借助于使用内置在测试结构中的栅极二极管进行的电气测量,可以对技术进行表征和优化。

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