The principles of an automated cross-talk extractor from thenmask-level description of a CMOS integrated circuit are detailed. Thenphysical extraction principles, the techniques for parasitic couplingnevaluation and modeling, the technique for back-annotating the schematicndiagram of the integrated circuit are presented. A model for mixed-levelnsimulation is proposed, covering various parasitic effects of thencross-talk phenomenon. The efficiency of the cross-talk extractor isndemonstrated through the analysis of mixed digital/analog CMOSnintegrated circuits where critical couplings are predicted andneliminated
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