Wafer Bonding: An Integration Route for Hybrid Ⅲ-Ⅴ/SiGe CMOS on 300mm

摘要

Direct wafer bonding is one of today's leading technologies for the dense co-integration of co-planar nano-scaled SiGe p-FETs and InGaAs n-FETs for future low power CMOS application. This paper reports on the fabrication of large-scale InGaAs on insulator substrates, addressing the challenges associated with wafer bonding of InGaAs. It then demonstrates that hybrid dual-channel substrates can also be fabricated by direct wafer bonding with stacked ultra-thin high-mobility layers. These hybrid substrates enable the fabrication of InGaAs/SiGe CMOS circuits.