Enhanced hole mobilities in tensile-strainedSi_1-yC_y alloy PMOSFETs

摘要

The incorporation of C in Si epitaxial layers can used as annalternative method to deposit tensile-strained Si layers directly on ansilicon substrate, for obtaining improved hole transport behavior in thenvalence band. The proposed method to produce tensile-strained layers isnattractive because it eliminates the need to deposit a thick relaxednSiGe buffer layer. Additionally, the elimination of this relaxed buffernlayer alloys the concern over dislocations and other defects propagatingnto the channel region. The fabrication and transport properties ofnPMOSFETs utilizing a strained-engineered Si_1-yC_ynchannel are reported for the first time in this paper