A 2.45GHz ultra-low power quadrature front-end in 65nm CMOS

摘要

This paper presents a 2.45GHz ultra-low power direct conversion receiver front-end, intended for applications such as medical implants and body area networks. It consists of low noise amplifier, passive quadrature mixers, voltage controlled oscillator and frequency divider. Manufactured in 65nm CMOS it achieves 27dB gain, 9dB noise figure and S11 better than −14dB, while consuming below 400µW from a 0.8V supply. It has an in band and out of channel IIP3 of −24.5 and −21dBm, repectively. Requiring only two inductors it occupies an area of less than 0.1 mm² excluding pads.