W-band front-end integrated circuits in 65nm CMOS technology.

摘要

Design and Implementation of W-band LNAs, down-converter, IQ-receiver and 80GHz DCO in 65nm is discussed in this thesis. Design methodology of the shunt-series, transformer-feedback LNA is investigated and compared to the traditional series-series, inductive feedback LNA. The performance of the down-converter incorporating the transformer-feedback LNA is described. With high bandwidth, low noise and low power consumption, the down-converter is suitable for imaging and remote sensing applications. The IQ-receiver is implemented to assess the feasibility of an image-reject receiver architecture and verify the quadrature operation of the VCO presented in [1]. The design of an 80GHz DCO is presented. This topology with digitally controlled, binary-weighted varactors offers a linear tuning curve and can be used in realizing fully digital synthesizers.