Soft-error tolerant design in near-threshold-voltage computing

摘要

In the advanced CMOS VLSI designs, lower supply voltage and smaller transistor lead to critical design challenges in dealing with soft-error interference, especial for the deisgn operating under near-threshold voltage. Some possible near-threshold voltage SEU-tolerant and SET-tolerant circuit design methods are discussed in this paper, such as robust C-element, Dual-Modular-Redundancy, Error-Correction with Duplication, and Error-Correction-with-shift-Timing-Output designs.