首页> 外文会议>The Pacific Rim/International, Intersociety Electronic Packaging Technical/Business Conference amp; Exhibition Jul 8-13, 2001, Kauai, Hawaii >THREE-DIMENSIONAL STRESS SINGULARITY FIELD AROUND A VERTEX OF EMBEDDED CHIP IN ELECTRONIC DEVICES USING FEM
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THREE-DIMENSIONAL STRESS SINGULARITY FIELD AROUND A VERTEX OF EMBEDDED CHIP IN ELECTRONIC DEVICES USING FEM

机译:电子器件中嵌入芯片顶点周围的三维应力奇异场的有限元分析

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摘要

It is well known that a stress singularity occurs at a vertex of joints, when materials with different mechanical and thermal properties are joined. In this paper, the distribution of stress, displacement and the order of stress singularity at the vertex of a chip embedded in an electronic packaging are examined using a three-dimensional FEM with a singular element. The stress singularity at a vertex of chip is investigated first in the cases with and without delamination between the chip and the resin enclosing the chip. Then, the contour of the order of singularity is mapped on the Dundurs' parameter plane. After that, the distribution of displacement and stress for several values of the order of singularity are calculated by solving an eigen equation. In particular, the distributions of stress and displacement considering thermal expansions of joint materials are examined.
机译:众所周知,当接合具有不同机械和热性能的材料时,应力奇异点会出现在接头的顶点。在本文中,使用带有奇异元素的三维有限元分析了嵌入在电子封装中的芯片顶点处的应力分布,位移和应力奇异性顺序。首先,在芯片与包围芯片的树脂之间存在分层和不分层的情况下,首先研究芯片顶点处的应力奇异性。然后,将奇异阶的轮廓映射到Dundurs的参数平面上。之后,通过求解本征方程,计算出奇异阶数个值的位移和应力分布。特别地,检查了考虑接头材料的热膨胀的应力和位移的分布。

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