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A fault-tolerant interconnections using LCDMA technique

机译:使用LCDMA技术的容错互连

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The need for an efficient and reliable interconnect architecture has been caused by continual technology scaling and increased communication requirements. Using of the logic code division multiple access (LCDMA) and hardware redundancy techniques in order to achieve fault-tolerant interconnection with reduced number of wires, are discussed in this paper. Three different fault-tolerant interconnection approaches are considered: a) adding odd and even parity bit; b) duplication and comparison; and c) triple module redundancy. For BER simulation Matlab tool is used. Taking classical TDMA transmission as a referent one, the amount of BER increase for all three methods is derived. The obtained results show that the increase is within a range from several up to hundred times.
机译:持续的技术扩展和不断增长的通信需求引起了对高效,可靠的互连体系结构的需求。本文讨论了使用逻辑码分多址(LCDMA)和硬件冗余技术,以减少线数实现容错互连。考虑了三种不同的容错互连方法:a)添加奇偶校验位; b)复制和比较; c)三重模块冗余。对于BER仿真,使用Matlab工具。以经典的TDMA传输为参考,推导了这三种方法的BER增加量。所获得的结果表明该增加在几倍至一百倍的范围内。

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