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Design, simulation, and fabrication of a new poly-Si based capacitor-less 1T-DRAM cell

机译:基于新型多晶硅的无电容器1T-DRAM单元的设计,仿真和制造

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摘要

In this paper, we propose a new fabrication method to form a polysilicon thin-film transistor with a smiling SiO2 layer. The experimental results suggest that the short-channel effects can be significantly reduced because the trench oxide is utilized to block the drain electric field. Furthermore, the so-called S/D tie can help to overcome the self-hating for enhancing the thermal reliability. And the device fabrication process is fully compatible with current conventional CMOS technology.
机译:在本文中,我们提出了一种新的制造方法来形成具有微笑SiO2层的多晶硅薄膜晶体管。实验结果表明,由于利用沟槽氧化物来阻挡漏极电场,因此可以显着降低短沟道效应。此外,所谓的S / D扎带可以帮助克服自讨厌,从而提高热可靠性。而且,器件制造工艺与当前的常规CMOS技术完全兼容。

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