Design of Efficient Sign Detector for Moduli Set ${2^{n}-1,2^{n}, 2^{n}+1}$ in Residue Number System

摘要

Sign detector is an important unit of the residue number system (RNS) for numerous digital signal processing applications. It has received considerably less attention than its reverse conversion and scaling problems. However, the sign detection is essentially required for residue number comparison, division and other difficult arithmetical operations in RNS. In this contribution, a sign detection algorithm for classical moduli-set {2^{n-1,2n, 2n+1} is proposed with less complex architecture by using scaling technique. The proposed sign detector circuit is implemented using a carry save adder (CSA), a carry-generation circuit and a simplified parallel prefix adder. The proposed algorithm is synthesized using design compiler of Synopsys tool and compared against the available literatures for the same moduli-set. The proposed design exhibits considerable reduction in time-delay, area and power as compared to others.}