Multi-channel high-linearity time-to-digital converters in 20 nm and 28 nm FPGAs for LiDAR applications

摘要

This paper proposes a new calibration method, the mixed-binning method, to pursue a TDC with high linearity in field-programmable gate arrays (FPGAs). This method can reduce the nonlinearity caused by large clock skews in FPGAs efficiently. Therefore, a wide dynamic range tapped delay line (TDL) TDC has been developed with maintained linearity. We evaluated this method in Xilinx 20nm UltraScale FPGAs and Xilinx 28nm Virtex-7 FPGAs. Results conduct that this method is perfectly suitable for driverless vehicle applications which require high linearity with an acceptable resolution. The proposed method also has great potentials for multi-channel applications, due to the low logic resource consumption. For a quick proof-of-concept demonstration, an 8-channel solution has also been implemented. It can be further extended to a 64-channel version soon.