Semi-systolic Modular Multiplier over GF(2{sup}m)

摘要

The key operations for the public-key cryptosystems are modular inversion, division, and exponentiation. The modular multiplication is considered to be the basic arithmetic for them. This paper proposes a new algorithm and it's semi-systolic array architecture to compute the modular multiplication over GF(2{sup}m). They are based on the standard basis representation and use the property of irreducible all one polynomial as a modulus. The architecture has the critical path with 1-D{sub}(XOR) per cell and has the latency with m+1. These properties are better than the existing multipliers. Since the proposed multiplier has regularity, modularity and concurrency, it is suitable for VLSI implementation and can be easily utilized for the crypto-processor chip design.