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Semi-systolic Modular Multiplier over GF(2~m)

机译:GF(2〜m)上的半收缩模乘器

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The key operations for the public-key cryptosystems are modular inversion, division, and exponentiation. The modular multiplication is considered to be the basic arithmetic for them. This paper proposes a new algorithm and it's semi-systolic array architecture to compute the modular multiplication over GP(2~m). They are based on the standard basis representation and use the property of irreducible all one polynomial as a modulus. The architecture has the critical path with 1-D_(XOR) per cell and has the latency with m+1. These properties are better than the existing multipliers. Since the proposed multiplier has regularity, modularity and concurrency, it is suitable for VLSI implementation and can be easily utilized for the crypto-processor chip design.
机译:公钥密码系统的关键操作是模块化求逆,除法和求幂。模乘被认为是它们的基本算法。本文提出了一种新的算法及其半脉动阵列结构,用于计算GP(2〜m)上的模乘。它们基于标准的基础表示形式,并使用所有一个多项式的不可约性作为模量。该体系结构具有关键路径,每个单元具有1-D_(XOR),而延迟则为m + 1。这些属性比现有的乘数更好。由于所提出的乘法器具有规则性,模块化和并发性,因此它适用于VLSI实现,并且可以轻松地用于密码处理器芯片设计。

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