Microelectronics neural bridge IC with voltage stimulation

摘要

A microelectronics neural bridge IC with voltage stimulation designed in CSMC 0.5μm CMOS process is presented. This IC is expected to be used for bridging animal's spinal nerves or peripheral nerves. It is composed of a neural electrical signal detecting circuit, a signal amplifying circuit, a DC offset compensating circuit and a functional electrical stimulation (FES) circuit. Two high performance op-amps are designed in the microelectronics neural bridge IC: a low noise op-amp and a constant-transconductance (constant-gm) rail-to-rail input/output op-amp. According to the neural signal spectrum, the bandwidth of the IC is designed from 400 Hz to 4 kHz. The chip area is 1050μm×850μm. The power consumption is 914μA when the supply voltage is ± 2.5V.