Novel packaging and thermal measurement for 3D heterogeneous stacks

机译：三维异构堆栈的新型包装和热测量

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Presents a collection of slides covering the following topics: packaging; thermal measurement: 3D heterogeneous stacks; heterogeneous integration; chip analysis; NCSU thermal test vehicle; EFFP thermal property extraction; bonding; calibration; HEMT; CMOS and air bridge metal measurement.

机译：呈现覆盖以下主题的幻灯片集合：包装;热测量：3D异构堆叠;异质整合;芯片分析; NCSU热试车; Effp热性质提取;粘接;校准; HEMT; CMOS和空气桥金属测量。

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《International Symposium on 3D Power Electronics Integration and Manufacturing》|2016年|406p|共11页
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T. Robert Harris; W. Rhett Davis; Paul Franzon;
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中图分类 TM1-53;
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Semiconductor device measurement; Indium phosphide; III-V semiconductor materials; Layout; Gallium nitride; Predictive models;

机译：半导体器件测量;磷化铟;III-V半导体材料;布局;氮化镓;预测模型;

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专利

1. 一种新型异构集成极端学习机模型及其软测量应用 [J] . 马宁, 董泽东南大学学报（英文版） . 2020,第001期
2. IMC growth reaction and its effects on solder joint thermal cycling reliability of 3D chip stacking packaging [J] . Wen-Hwa Chen, Ching-Feng Yu, Hsien-Chie Cheng, Microelectronics & Reliability . 2013,第1期

机译：IMC生长反应及其对3D芯片堆叠封装焊点热循环可靠性的影响
3. High-Sensitivity Measurement of Thermal Deformation in a Stacked Multichip Package [J] . Yasuyuki Morita, Kazuo Arakawa, Mitsugu Todo IEEE Transactions on Components and Packaging Technologies . 2007,第期

机译：堆叠式多芯片封装中热变形的高灵敏度测量
4. Effect of stacking chips and inlet positions on void formation in the encapsulation of 3D stacked flip-chip package [J] . C.Y. Khor, M.Z. Abdullah, Z.M. Ariff, Letters in heat and mass transfer . 2012,第5期

机译：堆叠芯片和入口位置对3D堆叠倒装芯片封装封装中空隙形成的影响
5. Novel packaging and thermal measurement for 3D heterogeneous stacks [C] . T. Robert Harris, W. Rhett Davis, Paul Franzon 2016 International Symposium on 3D Power Electronics Integration and Manufacturing . 2016

机译：3D异质堆叠的新颖封装和热测量
6. Optimal thermal management of stacked die package: Design for stackability [D] . Akhter, Roksana 2004

机译：堆叠式模具封装的最佳热管理：可堆叠性设计
7. Effect of Wafer Level Underfill on the Microbump Reliability of Ultrathin-Chip Stacking Type 3D-IC Assembly during Thermal Cycling Tests [O] . Chang-Chun Lee 2017

机译：晶圆级底部填充对热循环测试过程中超薄芯片堆叠式3D-IC组件微凸点可靠性的影响
8. Thermal Qualification of 3D Stacked Die Packages [O] . 2015

机译：三维堆叠芯片封装的热限定
9. Heterogeneous 3D IC Stacking Using Ultra-Dense Mechanically Flexible Interconnects. [R] . Jo, P. K., Zia, M., Gonzalez, J. L., 2016

机译：使用超密集机械柔性互连的异构3D IC堆叠。

Novel packaging and thermal measurement for 3D heterogeneous stacks

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