A Immunity Measurement Bench Dedicated to Analog To Digital Converter

摘要

This paper presents the design of a measurement bench dedicated to Analog To Digital Converter immunity. The immunity of the circuit is modeled and the ADC circuit exhibits susceptibility for voltage disturbances. The bench is presented and it uses a DPI derived technique in order to inject a disturbance voltage. A criterion study is done and some immunity results are given. At the end, the improvement of the measurement technique is described.