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Failure mechanism study and immunity modeling of an embedded analog-to-digital converter based on immunity measurements

机译:基于抗扰度测量的嵌入式模数转换器的故障机理研究和抗扰度建模

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摘要

In this paper, the failure mechanism of an embedded analog-to-digital converter (ADC) is studied and its immunity modeling with regard to electromagnetic interferences is presented. Failure causes are identified based on off-chip immunity measurements and without specific knowledge of the ADC's design. Disturbances coupling paths inside the ADC have been recognized as well as the conversion error mechanism. Then, immunity of the ADC is modeled using the ICIM-CI (Integrated Circuit Immunity Model for Conducted Immunity) black-box modeling approach. We show the interest of using the direct power injection (DPI) measurement technique for both analyzing and modeling the immunity of complex.integrated circuits. (C) 2015 Elsevier Ltd. All rights reserved.
机译:本文研究了嵌入式模数转换器(ADC)的故障机理,并提出了针对电磁干扰的抗扰度建模。根据片外抗扰度测量来确定故障原因,而无需对ADC的设计有特定的了解。 ADC内部的耦合路径干扰以及转换误差机制已得到公认。然后,使用ICIM-CI(传导免疫的集成电路抗扰度模型)黑盒建模方法对ADC的抗扰度进行建模。我们展示了使用直接功率注入(DPI)测量技术来分析和建模复杂集成电路的抗扰度的兴趣。 (C)2015 Elsevier Ltd.保留所有权利。

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