Optimal Set of Body Bias Voltages for an FPGA with Field-Programmable V{sub}(th) Components

摘要

An FPGA with field-programmable V{sub}(th) components can attain both high performance and low power consumption, without placement and routing constraints, by flexibly controlling the threshold voltage (V{sub}(th)) of transistors. Since V{sub}(th) for transistors for a specific circuit block in an FPGA is chosen from a set of V{sub}(th) values defined by body bias voltage set (BBVS), adequate selection of BBVS is important in the design decision process in a field-programmable V{sub}(th) method. In this paper, we present the effect of the selection of BBVS on static power reduction in an FPGA with field-programmable V{sub}(th) components. To select the optimal BBVS among several supplied body bias voltage candidates, several BBVSs are provided. The results show that the best BBVS achieves remarkable static power reduction, to as little as 1/30 the value in a conventional FPGA without performance degradation. In addition, the study on the optimal selection of body bias voltage for high-V{sub}(th) transistor in a BBVS reveals that deep reverse body bias for high-V{sub}(th) transistor does not necessarily offer the optimal condition, and optimization is necessary.