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Dynamic rule based approach to reduce power consumption of the fuzzy logic controller for embedded applications

机译:基于动态规则的嵌入式应用程序模糊逻辑控制器功耗的方法

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With the advancement of Electronics and IC technology, the use of controllers and processors increased drastically in the last two decades to solve complex problems efficiently with better accuracy and fast time being response. When the complexity of the problem is very high and proper mathematical model of the problem is unknown, general purpose processors or controller do not serve useful purpose. Fuzzy logic controller has the potential to solve problems which have uncertain nature and complex behavior with better, accurate and efficient results and also with faster time response as compare to classical logic based general purpose controllers or processors like PID controllers. The development of the fuzzy logic based controller follows step by step approach with expertise knowledge. As Fuzzy logic controllers are developed for the particular problem solving applications i.e., they are not general purpose controllers in nature. However, in real time, it is possible to generalize fuzzy logic controller by switching its rule base. However, there is a lack of power reduction techniques for fuzzy logic controller when the application is concerned for embedded applications. As embedded devices are battery operated and have limited power supply, there is a need of a proper approach and method to reduce the power consumption. This paper focuses on rule base division technique to reduce the power consumption of the fuzzy logic controller based on different conditions and priorities. A new methodology is developed and implemented successfully to reduce the power consumption of the fuzzy logic controller i.e., dynamic rule base method. The implementation of the dynamic rule base method is carried out using Xilinx ISE Design 14.2 with Verilog-HDL as a coding language. The implementation of controller is successfully carried out on Kintex 7 KC705 FPGA kit.
机译:随着电子产品和IC技术的进步,在过去的二十年中,控制器和处理器的使用急剧增加,以有效地解决复杂的问题,以更好的准确性和快速的时间是响应。当问题的复杂性是非常高且正确的数学模型的问题是未知的,通用处理器或控制器不提供有用的目的。模糊逻辑控制器有可能解决具有不确定性质和复杂行为的问题,以及更好,准确,有效的结果,以及与基于PID控制器等经典逻辑的通用控制器或处理器相比,更快的时间响应。基于模糊逻辑的控制器的开发遵循步骤方法,具有专业知识。由于模糊逻辑控制器是为特定问题解决应用而开发的,因此它们不是本质上的通用控制器。但是,实时地,可以通过切换其规则基础来概括模糊逻辑控制器。然而,当应用程序关注嵌入式应用时,缺乏模糊逻辑控制器的功率降低技术。由于嵌入式设备是电池供电并具有有限的电源,需要采用适当的方法和方法来降低功耗。本文侧重于规则基分型技术,以减少基于不同条件和优先级的模糊逻辑控制器的功耗。成功开发并实施了一种新的方法,以减少模糊逻辑控制器的功耗,即动态规则基础方法。使用具有Verilog-HDL作为编码语言的Xilinx ISE设计14.2执行动态规则基础方法的实现。控制器的实施成功地在Kintex 7 KC705 FPGA套件上执行。

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