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Dynamic rule based approach to reduce power consumption of the fuzzy logic controller for embedded applications

机译:基于动态规则的方法,可降低嵌入式应用中模糊逻辑控制器的功耗

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With the advancement of Electronics and IC technology, the use of controllers and processors increased drastically in the last two decades to solve complex problems efficiently with better accuracy and fast time being response. When the complexity of the problem is very high and proper mathematical model of the problem is unknown, general purpose processors or controller do not serve useful purpose. Fuzzy logic controller has the potential to solve problems which have uncertain nature and complex behavior with better, accurate and efficient results and also with faster time response as compare to classical logic based general purpose controllers or processors like PID controllers. The development of the fuzzy logic based controller follows step by step approach with expertise knowledge. As Fuzzy logic controllers are developed for the particular problem solving applications i.e., they are not general purpose controllers in nature. However, in real time, it is possible to generalize fuzzy logic controller by switching its rule base. However, there is a lack of power reduction techniques for fuzzy logic controller when the application is concerned for embedded applications. As embedded devices are battery operated and have limited power supply, there is a need of a proper approach and method to reduce the power consumption. This paper focuses on rule base division technique to reduce the power consumption of the fuzzy logic controller based on different conditions and priorities. A new methodology is developed and implemented successfully to reduce the power consumption of the fuzzy logic controller i.e., dynamic rule base method. The implementation of the dynamic rule base method is carried out using Xilinx ISE Design 14.2 with Verilog-HDL as a coding language. The implementation of controller is successfully carried out on Kintex 7 KC705 FPGA kit.
机译:随着电子和IC技术的发展,在过去的二十年中,控制器和处理器的使用急剧增加,以有效地解决复杂问题,并具有更高的准确性和响应速度。当问题的复杂性很高并且问题的正确数学模型未知时,通用处理器或控制器将无法发挥作用。与传统的基于逻辑的通用控制器或诸如PID控制器的处理器相比,模糊逻辑控制器具有解决具有不确定性和复杂行为的问题的潜力,具有更好,准确和高效的结果,并且具有更快的时间响应。基于模糊逻辑的控制器的开发遵循具有专业知识的逐步方法。由于模糊逻辑控制器是为特定的问题解决应用程序开发的,也就是说,它们本质上不是通用控制器。但是,可以通过切换规则库来实时概括模糊逻辑控制器。但是,当应用程序涉及嵌入式应用程序时,就缺少模糊逻辑控制器的功耗降低技术。由于嵌入式设备由电池供电且电源有限,因此需要一种适当的方法和方法来降低功耗。本文重点研究基于规则的分割技术,以根据不同的条件和优先级降低模糊逻辑控制器的功耗。开发并成功实施了一种新的方法,以减少模糊逻辑控制器的功耗,即动态规则库方法。动态规则库方法的实现是使用Xilinx ISE Design 14.2(以Verilog-HDL作为编码语言)进行的。控制器的实现已在Kintex 7 KC705 FPGA套件上成功完成。

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