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Electrical Study of DSA shrink process and CD rectification effect at sub-60nm using EUV test vehicle

机译:使用EUV试验载体对DSA收缩过程和CD校正效应的电气研究

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In this study, the integrity and the benefits of the DSA shrink process were verified through a via-chain test structure, which was fabricated by either DSA or baseline litho/etch process for via layer formation while metal layer processes remain the same. The nearest distance between the vias in this test structure is below 60nm, therefore, the following process components were included: 1) lamella-forming BCP for forming self-aligned via (SAV), 2) EUV printed guiding pattern, and 3) PS-philic sidewall. The local CDU (LCDU) of minor axis was improved by 30% after DSA shrink process. We compared two DSA Via shrink processes and a DSAControl process, in which guiding patterns (GP) were directly transferred to the bottom OPL without DSA shrink. The DSAControl apparently resulted in larger CD, thus, showed much higher open current and shorted the dense via chains. The non-optimized DSA shrink process showed much broader current distribution than the improved DSA shrink process, which we attributed to distortion and dislocation of the vias and ineffective SAV. Furthermore, preliminary defectivity study of our latest DSA process showed that the primary defect mode is likely to be etch-related. The challenges, strategies applied to improve local CD uniformity and electrical current distribution, and potential adjustments were also discussed.
机译:在这项研究中,完整性和DSA的收缩过程的好处是通过一个经由链测试结构,其同时金属层的过程保持不变经由层形成由任一DSA或基线光刻/蚀刻工艺制造用于验证。在该测试结构的通孔之间的最近距离是低于60纳米,因此,被包括在下列过程组成:1)薄片形成用于形成自对准通孔(SAV),2)EUV印刷引导图案,以及3)PS BCP -philic侧壁。短轴的本地CDU(LCDU)由30%DSA收缩处理后好转。我们比较了两种DSA通过收缩过程和一个DSAControl方法,其中引导图案(GP)直接传递到底OPL而不DSA收缩。该DSAControl显然造成了较大的CD,因此,表现出更高的开电流和短路通过链密集。非优化DSA收缩过程显示出比改进的DSA收缩过程中,这是我们归因于失真和通孔和无效SAV的位错更广泛的电流分布。此外,我们最新的DSA过程的初步缺陷研究表明,主要的缺陷模式很可能是腐蚀有关。所面临的挑战,战略应用到改善当地CD均匀性和电流分配和潜在的调整进行了讨论。

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