FPGA architecture for 3-D FDTD acceleration using open CL

摘要

The finite difference time domain (FDTD) method [1] is widely used in electromagnetic simulations. It is an iterative process where the computations in one iteration use the results of its previous iterations. Since the number of iterations are usually very large, FDTD computation requires a large amount of processing time. One the other hand, most of the computations corresponding to the cells in the same iteration (apart from the cells on the boundaries) are completely independent of each other. Therefore, both multicore CPUs and GPUs are already used to accelerate the computation. However, the external memory is accessed in every iteration, so that the processing speed is restricted by the external memory bandwidth.