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Exploring Efficient Acceleration Architecture for Winograd-Transformed Transposed Convolution of GANs on FPGAs

机译：在FPGA上探索Winograd转换转换转换卷积的高效加速架构

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Xinkai Di; Hai-Gang Yang; Yiping Jia; Zhihong Huang; Ning Mao;
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1. Exploring Efficient Acceleration Architecture for Winograd-Transformed Transposed Convolution of GANs on FPGAs [J] . Progress in Artificial Intelligence . 2020,第2期

机译：在FPGA上探索Winograd转换转换转换卷积的高效加速架构
2. FPGA Design for Efficient Architecture for the Convolution Encoder and Viterbi Decoder [J] . Vinita Soni, Prof. Sandip Nemade International Journal of Engineering Trends and Technology . 2014,第2期

机译：用于卷积编码器和Viterbi解码器的高效架构的FPGA设计
3. Uni-OPU: An FPGA-Based Uniform Accelerator for Convolutional and Transposed Convolutional Networks [J] . Yu Yunxuan, Zhao Tiandong, Wang Mingyu, IEEE transactions on very large scale integration (VLSI) systems . 2020,第7期

机译：UNI-OPU：基于FPGA的统一加速器，用于卷积和转置卷积网络
4. Exploring Resource-Efficient Acceleration Algorithm for Transposed Convolution of GANs on FPGA [C] . Xinkai Di, Haigang Yang, Zhihong Huang, International Conference on Field-Programmable Technology . 2019

机译：探索FPGA上GAN的转置卷积的资源高效加速算法
5. Architecture and Automation for Efficient Convolutional Neural Network Acceleration on Field Programmable Gate Arrays [D] . Hall, Mathew Kent. 2020

机译：现场可编程门阵列高效卷积神经网络加速的体系结构和自动化
6. Efficient BinDCT hardware architecture exploration and implementation on FPGA [O] . Abdessalem Ben Abdelali, Ichraf Chatti, Marwa Hannachi, 2016

机译：高效的BinDCT硬件架构探索和FPGA实现
7. Efficient FPGA Acceleration of Convolutional Deep Neural Networks [O] . Rahman Atul 2016

机译：卷积深度神经网络的高效FPGA加速

Exploring Efficient Acceleration Architecture for Winograd-Transformed Transposed Convolution of GANs on FPGAs

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