A Sub-1V 0.18μm Output-Capacitor-Free Digitally Controlled LDO

摘要

The new digital control loop of the low-dropout regulator (LDO) is presented. It is composed of coarse tracking circuit and fine tracking circuit, and no external output capacitor is required to stabilize the control loop. The proposed method makes the quiescent current lower than conventional analog LDOs. The operational amplifier of the conventional LDO fails to operate at 0.7V, and the developed digital LDO in 0.18μm CMOS achieved the 0.7V input voltage and 0.5V output voltage with 99.99% current efficiency and 2.6-μA quiescent current at 20mA load current. Therefore, the proposed DLDO is suitable for low power applications.