Feature Selection Technique to Improve Performance Prediction in a Wafer Fabrication Process

摘要

Fabrication of integrated circuits onto the raw silicon wafers is one major task of most complex semiconductor manufacturing. The fabrication process consists of a series of steps to cover special material layers over the wafer surface. Wafers re-enter the same processing machines as each layer is successively covered. Some defects in this complicated process can make the final products fail the test. Early fault detection during this critical manufacturing process can obviously improve product quality and reliability. However, timely yield analysis of large scale and multi-dimensional data that are constantly and automatically generated from hundreds of operational units in the production line of modern semiconductor industry is a challenging problem for process engineers. In this paper, we propose a novel feature selection technique to reduce dimensions of data and also to increase the prediction accuracy of the induced model.